Initial training apparatus for use in a transmitter and receiver apparatus

ABSTRACT

An initial gain of an automatic equalizer is fixed to a predetermined value. Then, the most appropriate gain of the automatic equalizer is determined when a training signal is received by the automatic equalizer. An echo replica signal produced by an echo canceler is multiplied by the value obtained by dividing the most appropriate gain by the initial gain. Thus, the echo replica signal is corrected to cancel the echo signal included in the output of the automatic equalizer. The sampling rate of the A/D converter used in the transmitter and receiver is shifted by a predetermined value from the transmission line rate at an initial training stage. Thereafter, the sampling rate of the A/D converter is determined to be near that of the transmission line.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a transmitter and receiver apparatus(transceiver) and in particular relates to an initial training apparatusfor use in an echo canceler transmission apparatus for correcting anecho signal in the best way by using an adaptive gain of an automaticequalizer.

2. Description of the Related Art

Equipment for transmitting and receiving signals is used to takeadvantage of the recently introduced bidirectional digital transmissionmethod.

FIG. 1 shows a system structure based on digital subscriber linetransmission. In FIG. 1, 1 designates a terminal apparatus providedwithin a subscriber's premises and 2 a transmission apparatus(transmitter). The subscriber's premises are connected to othertransmission apparatuses in a station by a subscriber line 3, which is atwo-wire metallic cable. This cable is used for bidirectional digitaltransmission, and provides a data capacity of 160 kb/s. A structuralview of a transmission apparatus for a subscriber's premises is shown inFIGS. 2A and 2B. Generally, the transmission apparatus needs anautomatic equalizer EQL to compensate for a waveform distortion on atransmission line.

Further, some transmission apparatuses include an echo canceler forsuppressing echo leaking from a transmitted signal, and some do not.FIG. 2A shows a structural view of a transmitting apparatus based on aping-pong transmission method, which does not use an echo canceler, andFIG. 2B shows a structural view of a transmission apparatus based on anecho cancelling transmission method, which does use an echo canceler. Atpresent, a ping-pong transmission system is used in Japan and an echocancelling transmission system is used in Europe and North America.

In the ping-pong transmission system, as illustrated in FIG. 2A, thedata capacity for transmission is 160 kb/s, but as bidirectionaltransmission is used in a time divisional manner, the data capacity onsubscriber line 3 is doubled, to 320 kb/s. Transmitting or receiving isswitched by a transmitting and receiving switch SW. Transmission data iscoded by a coding circuit, (coder) COD, and are driven by a line driverDRV. At this time a transmission switch SW selects a transmission siteto transmit a signal on a subscriber line 3. On the other hand, areceived signal transmitted from subscriber line 3 is selected by atransmitting and receiving switch SW, and then enters line equalizerEQL. Line equalizer EQL includes √F AGC (automatic gain control) andautomatically controls gain lost in a transmission line of a subscriberto automatically correct a gain matched with a frequency. The output ofline equalizer EQL is applied to decoder DEC, thereby providing receiveddata. In this case, timing reproducing circuit TIM reproduces a clocksignal, namely, a synchronizing signal from a received signal anddecodes the received data by using the clock. This ping-pongtransmission method uses bidirectional signals on a transmission line ina time divisional manner. Thus, when transmission data are transmittedoutwardly, they do not leak into the receiving side. Therefore, thissystem does not need an echo canceler. On the other hand, the datacapacity of the transmission line becomes double the demanded datacapacity of 160 kb/s, namely 320 kb/s. Therefore, a smaller hardware isrequired, but the transmission rate is lowered, so that there is atrade-off relationship.

FIG. 2B shows the structure of an echo canceler transmission system.Transmission data are coded by a coding circuit COD and are transmittedon subscriber line 3 through line driver DRV. In an echo cancelertransmission system, data capacity of a transmission on subscriber line3 is 160 kb/s and it does not perform bidirectional time divisionalmultiplexing. Then, transmitted and received signals are multiplexed inan analog manner. A received signal is inputted to hybrid circuit HYBi.e. a 2-wire/4-wire conversion circuit, from subscriber line 3. Where atransmission signal is transmitted on subscriber line 3 through hybridcircuit HYB, a part of it leaks as an echo, and is turned into its ownapparatus on the receiving side. Therefore, in order to cancel an echosignal, an echo canceler EC is added. Echo canceler EC has, for example,a transversal filter structure. A pseudo echo (echo replica) isartificially formed as an impulse response to a transmitted signal.Coefficients of the transversal filter are determined by the echosignal, thereby producing the echo replica.

The echo replica is subtracted from the echo signal which leaks into thereceiving side, thereby cancelling it. The received signal is therebyinput into line equalizer EQL in which a gain for compensating a loss ofa transmission line is automatically formed. The received signal isautomatically multiplied by the gain, and the timing reproductioncircuit extracts a synchronizing clock signal from it. A decodingcircuit DEC decodes the received signal based on the synchronizing clocksignal. This echo canceler transmission method needs an echo cancelerand thus increases the volume of hardware. However, the transmissioncapacity of a subscriber line remains the same as that of the datacapacitor, i.e. 160 kb/s. Thus, a time division multiplexing is notnecessary for transmission. The transmission apparatus of an echocanceler transmission method includes a line equalizer and an AGCcircuit to compensate for a waveform distortion on the transmission lineand an echo canceler for suppressing leaking echoes of the transmittedsignal. Before starting a normal data transmission, and upon an initialtraining in which a synchronization is established between transmittingand receiving sides, the gain and the coefficient of an echo cancelerapparatus are determined. In other words, the initial training of thetransmission apparatus comprises a training by an echo canceler and atraining by an AGC. The performance of the transmission apparatusdepends on how the initial training is conducted.

FIG. 3A shows the transmission apparatus which uses an echo cancelermethod. The apparatus includes the above automatic equalizer and echocanceler. The transmission apparatus comprises an echo canceler EC,automatic equalizer EQL, hybrid circuit HYB, subscriber line 3, a codingcircuit COD and A/D converter A/D.

The apparatus shown in FIG. 3A performs an echo cancellation beforeautomatic equalizer EQL. The apparatus shown in FIG. 3B relates to amethod of performing an echo cancellation after the automatic equalizerEQL. The apparatus shown in FIG. 3C relates to a method of performing anecho cancellation both before and after the automatic equalizer EQL.

As shown in FIG. 3A, when an initial training is conducted, a pulsesignal is transmitted from the apparatus to a transmission line throughhybrid circuit HYB. This pulse signal trains an echo canceler EC, and anecho formed by a transmission pulse through a hybrid circuit is input toa subtraction circuit after it is subjected to A/D conversion. Thecoefficients of the EC is changed such that the difference between theoutput from the EC and the echo signal included in it decreases, therebyforming an echo replica. After the echo is canceled in this manner,equalizer EQL amplifies the received signal by the gain lost through thetransmission line. If echo canceler EC and automatic equalizer EQL areall formed by an analog circuit, their control becomes difficult. Thus,in this structure, an A/D converter is provided at the output of hybridcircuit HYB. Therefore, various digital processes are conducted in adigital manner, and thus, the A/D converter must have about 13-bitaccuracy. Therefore, the load on the digital circuit increases. Aftertraining of the echo canceler is completed, signals transmitted fromanother apparatus via the same circuit through a transmission line isreceived by hybrid circuit HYB, thereby enabling automatic equalizer EQLto be trained for a line equalization. After a predetermined timeperiod, training of the automatic equalizer is completed. This methodfollows a rule that a training of echo canceler EC is conducted prior tothat of automatic equalizer EQL.

On the other hand, when the apparatus shown in FIG. 3B is trained, anecho canceler is positioned after the automatic equalizer. Thisapparatus is suitable for a rule in which a gain training is firstconducted by an automatic equalizer in a way similar to that describedabove and thereafter, an echo training is conducted by using the echocanceler. If this rule is followed, the amplitude of the echo signal isdetermined by the gain of the automatic equalizer, and this kind of echocanceler performs a better cancellation than that of the apparatus shownin FIG. 3A. However, this is not applied to a rule in which an echocanceler training is conducted prior to an automatic equalizer training.

The apparatus shown in FIG. 3C performs echo cancellation both beforeand after the automatic equalizer. In this case, the A/D converter ispositioned after the automatic equalizer. Thus, conversion accuracy ofthe A/D converter can be decreased. Echo cancelling is conducted beforethe equalizer EQL through analog processing and an A/D converter ofabout 10 bit accuracy is sufficient, thereby decreasing the load on thedigital circuit and facilitating manufacture of LSIs.

The transmission apparatus shown in FIG. 4 comprises a master-sidetransmission unit 10 and an opposite slave-side transmission unit 11,and respective units comprise source oscillators 12 and 13, whoseoscillation frequencies are divided to determine the desiredtransmission speed.

An automatic equalizer provided within a transmission apparatus, asshown in FIG. 5, is known. The analog output of analog line equalizer15, which produces a gain characteristic of a sufficient value uponreceiving an input signal, is sampled and converted to a digital signalby A/D converter 16, thereby providing a sampled value X_(n) of thereceived signal. Power arithmetic operation circuit 17 performs anarithmetic operation to produce an average value E(Xn²) of the power ofa digitally sampled value Xn output from A/D converter 16. AGC circuit18 performs an arithmetic operation to determine the most appropriategain. The sampling frequency applied to A/D converter 16 can be obtainedby the dividing clock frequency f_(m) of source oscillators 12 and 13(as shown in FIG. 4).

Therefore, AGC circuit 18 can determine the most appropriate adaptivegain after training.

The method shown in FIG. 3A is disadvantageous in that a residual echo,which cannot be canceled by echo canceler EC, is amplified by afiltering characteristic of the automatic equalizer EQL, so that itappears as the received signal, if the accuracy of the A/D converter isdecreased. Therefore, in order to avoid the above defect, it isnecessary to increase the accuracy of the A/D converter.

The methods disclosed in FIGS. 3B and 3C can achieve an echocancellation of the output from the automatic equalizer EQL as thetraining of echoes is conducted after the training of equalizer EQL.However, in this method, the order of training is predetermined and ifit is not satisfied, the most appropriate training cannot be conducted,under a rule that the training of equalizer EQL is conducted after thetraining of echoes.

In FIG. 3C, the echo cancelers are provided before and after theequalizer EQL. However, the echo canceler provided after the equalizerEQL cannot conduct the training of the echo canceler before that of theequalizer EQL. In other words, the echo canceler is used under a rulethat the training of the equalizer is conducted prior to that of theecho canceler.

Such initial training of an automatic equalizer is conducted at thebeginning of the initial training of a transmission apparatus, and inmost cases when timing (phase) data of a received signal has not yetbeen obtained.

In order to perform AGC training during a period when timing data doesnot exist, it is necessary to perform an A/D conversion of a receivedsignal at a sampling frequency Nxf_(s) which is more than twice thereceived signal frequency f_(s) (transmission rate).

The great barrier is that the automatic equalizer installed with the A/Dconverter has a high sampling frequency and is made of LSIs. Thisinhibits the development of an inexpensive, compact and highly reliabletransmission apparatus. The transmission speed increases with theexpansion in transmission capacity, as has been observed recently. Thisis a further difficulty.

SUMMARY OF THE INVENTION

Therefore, the present invention is aimed at performing an initialtraining which is independent of the training of the transmissionapparatus, or the communication apparatus, in which an echo canceler ispositioned after the automatic equalizer and particularly aimed atconducting the most appropriate training even under a rule that thetraining of the echo canceler is performed prior to that of theequalizer EQL.

The present invention is aimed at providing an initial training methodfor an automatic equalizer installed with an A/D converter having a lowsampling speed, which is suitable for LSIs.

An initial training apparatus for a communication apparatus of thepresent invention is shown in FIG. 6, and is explained by referring tothe training sequence shown in FIG. 7.

FIG. 6 shows the principle of the present invention. In the drawing, 21is an echo canceler, 22 is an automatic equalizer, 23 is a gaincorrecting unit, 24 is a multiplier, and 25 is a subtractor.

According to the present invention, first the output of a gain corrector23, namely the gain, is set at the unity gain, or 1, and the gain of theautomatic equalizer is set at G_(I) even under a rule that the echocanceler is provided after the equalizer and that the training of echocanceler is conducted prior to that of the equalizer. A pulse istransmitted as a training signal to perform the training of echocanceler, the adaptive gain G_(F) of the returned received signal isobtained by an automatic equalizer, and G_(F) is input to the gaincorrecting circuit 23. Echo canceler 21 outputs an echo replica of thetraining signal. The output of the echo canceler 21 is multiplied by theunity gain "1" at the first training, and the echo canceler 21 performsa training such that the difference between the echo replica and leakingecho, i.e. the output from automatic equalizer 22, is decreased. Theadaptive gain G_(F) is obtained by gain correcting circuit 23 bydividing G_(F) by G_(I). For example, the echo replica is multiplied byG_(F) /G_(I) , thereby performing another echo cancellation. The presentinvention fixes an initial gain G_(I) of automatic equalizer 22 andtrains echo canceler 21 by using the transmitting training signal. Itperforms a training of automatic equalizer 22 by using the receivedtraining signal to produce the adaptive gain G_(F), and corrects theamplitude of echo replica ER from echo canceler 21 upon communication,by using results obtained by comparing the adaptive gain G_(F) with theinitial gain G_(I). Even if the echo canceler is provided after theequalizer, the present invention is suitable for a rule under thecondition that the training of the echo canceler is conducted prior tothat of the equalizer.

It is also preferable that sampling frequency of an A/D converterinstalled in an automatic equalizer which is suitable for an LSI isabout the transmission path rate.

However, when the sampling frequency is equal to the transmission speed,it is not determined at which point in period T a sampling is performed.Thus, the result of an arithmetic operation of a power is either closeto 0 or large.

Therefore, according to the initial training method using the automaticequalizer of the present invention, the sampling frequency of the A/Dconverter is made to correspond with the transmission speed, or thecommunication frequency, f_(s), and the initial training is set to thefrequency f_(s) ±Δ, obtained by changing frequency f_(s) by apredetermined value and on completion of a training, the sampling(transmission) frequency is used.

By transmitting a training signal to a transmission line, a training ofecho canceler 21 is performed, where echo canceler is trained before theequalizer, even if the echo canceler is provided after the equalizer. Inthis case, automatic equalizer 22 is positioned before echo canceler 21,and thus the gain of automatic equalizer 22 is fixed at an initial gainG_(I).

When a training of echo canceler 22 is completed as explained above, atraining of automatic equalizer 22 is performed by using a trainingsignal received from another apparatus.

Thereafter, the transmission apparatus moves to an ordinarycommunication operation, and at this time, a echo replica ER, producedby echo canceler 21 to perform an echo cancellation, is corrected by theresult obtained by comparing the adaptive gain G_(F) with the initialgain G_(I), namely, the value obtained by dividing G_(F) by G_(I).

As described above, echo canceler 21 performs a training using aninitial gain GI. Even if automatic equalizer 22 is positioned beforeecho canceler 21, a training can be conducted in the order ofcancellation of echo canceler 21 and then equalization of automaticequalizer 22.

When a training is conducted in the order of equalization of automaticequalizer 22 and then cancellation of echo canceler 21 in the samemanner as in the prior art, it can be done in the same manner as in theapparatus shown in FIG. 3B, thereby utilizing no initial gain correctionof the echo replica.

Therefore, an initial training of a transmission apparatus can berealized regardless of the training sequence.

According to another feature of the present invention, the samplingfrequency is intentionally shifted by a predetermined value Δ to providea frequency f_(S) ±Δ and this sampling clock is made to run by a timingreproduction circuit in the following stage, thereby scanning a receivedsignal and enabling an AGC to be applied.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing the digital subscriber linetransmission,

FIGS. 2A to 2B illustrates different transmission systems,

FIGS. 3A to 3C show prior art transmission apparatuses using echocancelers,

FIG. 4 shows a schematic diagram of a transmitting system,

FIG. 5 is a block diagram of a conventional transmission apparatus,

FIG. 6 is a block diagram showing the principle of the presentinvention,

FIG. 7 shows the operational sequence of the present invention,

FIG. 8 shows a block diagram of an embodiment of the present invention,

FIG. 9 is a block diagram of the automatic gain controller shown in FIG.8, according to an embodiment of the present invention,

FIG. 10 shows a characteristic graph of a subscriber line showing therelationship between line loss and frequency,

FIG. 11 shows frequency characteristics of the gain of the √f AGCequalizer,

FIG. 12A shows a circuit construction of the √f equalizer,

FIGS. 12B and 12C show basic diagrams of the amplifiers used in the √fequalizer shown in FIG. 12A.

FIG. 13 is a circuit diagram of the line equalizer,

FIG. 14 is a circuit diagram of a fine plane gain amplifier,

FIG. 15 is a circuit diagram of the gain setting unit in FIG. 12A,

FIG. 16 shows a flow chart of an operation of a √f AGC,

FIG. 17A is a flow chart of a √f AGC and FIG. 17B is a table referred toby the √f AGC shown in FIG. 17A,

FIG. 18A is a block diagram of a transversal type echo canceler, FIGS.18B is a timing chart for explaining an operation of the echo canceler,

FIG. 19 is a block diagram of a table reference type echo canceler,

FIGS. 20A to 20C are schematic drawings for explaining a correction ofan error of an echo replica together with waveforms of a received signaland transmitting signal,

FIG. 21 is a diagram explaining a waveforming conducted by a √f AGCequalizer,

FIG. 22 is a circuit diagram of a hybrid circuit,

FIG. 23 shows a timing chart for explaining an initial training of thetransmission apparatus for a switching timing of switches in FIG. 8,

FIG. 24 shows a timing chart for explaining an initial training of thetransmission operation for a switch in FIG. 8,

FIG. 25 shows a timing chart for explaining an initial training of thetransmission apparatus for a switch in FIG. 8,

FIGS. 26A and 26B are timing charts of sampling operation of the priorart and the present invention respectively,

FIG. 27 shows the principle of the embodiment shown in FIG. 26B,

FIGS. 28 to 30 show embodiments for determining an appropriate samplingrate.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

An embodiment of the present invention will be explained by referring tothe attached drawings.

FIG. 8 shows an embodiment of an initial training apparatus for use in acommunication apparatus. 21 represents an echo canceler; 26 is anautomatic equalizer comprising a line equalizer 22, AGC circuit 27 andA/D converter 28; 29 is a hybrid circuit; 30 is a switch for switchingthe fixed initial gain G_(I) and the most adaptive gain G_(F) obtainedby an arithmetic operation by AGC circuit 27; 23 is a gain correctingcircuit for obtaining a ratio of the adaptive gain G_(F) to initial gainG_(I) ; 31 is a switch for selecting either of the outputs from the gaincorrecting circuit or gain "1"; 24 is a multiplier for multiplying anecho replica ER produced by echo canceler 21 by switch 31; and 25 is asubtractor.

Automatic equalizer 26 receives a received signal, converts it to adigital signal, calculates the power of the digital signal, calculatesthe adaptive gain by AGC circuit 27 based on this power, and amplifiesthe received signal by using the gain of line equalizer 22. As describedabove, in the present invention, the echo canceler is provided after theequalizer to decrease the number of bits of the A/D converter,performing the most appropriate initial training under a rule that thetraining of the echo canceler is conducted prior to that of theequalizer.

An operation of this embodiment is explained.

1. At first, switch 30 is switched to the side of initial gain G_(I) fora training of echo canceler 21, and switch 31 for correcting an echoreplica ER is switched to the non-correction side (1). Thus, the gain ofline equalizer 22 is fixed at G_(I).

2. An echo replica ER produced by echo canceler 21 is arithmeticallyoperated on by a training signal which is transmitted from the home ororiginating apparatus, and a tap coefficient (not shown) for producingthe most appropriate echo replica is held within echo canceler 21. Thiscompletes a preliminary training of echo canceler 21 .

3. Next, switch 30 is switched to the side of AGC circuit 27. Therefore,AGC circuit 27 performs an AGC operation to obtain the adaptive gainwhich is most appropriate.

4. AGC circuit 27 arithmetically determines the adaptive gain G_(F)within a predetermined training period. By using a training signalreceived from another apparatus. AGC circuit provides line equalizer 22with the adaptive gain G_(F) and maintains the adaptive gain G_(F).Thus, a training of AGC circuit 27 is completed.

5. The adaptive gain G_(F) held in AGC circuit 27, and initial gainG_(I), are transmitted to gain correcting circuit 23, and the ratioG_(F) /G_(I) is calculated.

6. Finally, switch 31 is switched back to the side of gain correctingcircuit 23 to prepare it for correcting an echo replica ER produced byecho canceler 21 .

7. As described above, when training is completed, the system enters thecommunication state. Multiplying unit 24 multiplies an echo replica ERoutput from echo canceler 21 by the ratio output from gain correctingunit 23, thereby correcting echo replica ER output from echo canceler21, and completing a preliminary training.

If G_(I) >G_(F), echo replica ER is decreased.

Switching of switch 30 is conducted upon completion of a training ofecho canceler 21 and a switching of switch 31 is conducted uponcompletion of a training of AGC circuit 27. These switches 30 and 31 areoperated automatically.

FIG. 9 shows the structure of automatic equalizer 26. 261 shows a coarseamplifier, 262 a fine amplifier, 263 an A/D converter, 264 a powercomputation unit and 265 a gain setting unit.

Line equalizer 22 compensates for line loss in a subscriber line of areceived signal and performs a waveforming i.e. equalization of thereceived signal. FIG. 10 shows a line characteristic of a subscriberline. As shown, when frequency increases, line loss increases inproportion to √f. For example, at 100 KHz line loss is 50 dB. Thus, ifthe opposite apparatus transmits a signal of 100 KHz, there is a loss of50 dB at the receiving end, which deteriorates the waveform. In order tocompensate for this deterioration and to perform a waveforming on thereceived signal it is necessary to amplify the received signal by 50 dBat 100 KHz. This is conducted by coarse amplifier 261 and fine amplifier262 in the line equalizer shown in FIG. 9. Coarse amplifier 261 showsslope gain characteristics and flat gain characteristics, and fineamplifier 262 shows flat gain characteristics. In order to determine thegain of respective amplifiers 261 and 262, the power of the receivedsignal is calculated. Therefore, when the signal is received, it isinput to A/D converter 263 through amplifiers 261 and 262, and a powercalculation is conducted by digital power computation unit 264 on theoutput of the A/D converter 263. Gain setting unit 265 determines thegain based on the power calculation. Namely, an automatic gain controlcircuit, i.e. AGC circuit 27, controls the gain automatically by usingpower computation unit 264 and gain setting unit 265. Gain setting unit265 contains a table representing a relationship between the powervalues and control signals used for switching of the switch whichautomatically selects a gain corresponding to the power. Coarseamplifier 261 has a slope gain characteristic in which gain varies withfrequency. Fine amplifier 262 has a flat gain characteristic in whichgain is independent of frequency. First, coarse amplifier 261 performs acoarse control of the input signal. Then fine amplifier 262, which has aflat gain characteristic, performs a precise adjustment. A frequencycharacteristic, i.e. √f AGC equalizer gain frequency characteristic,which is obtained by these amplifiers 261 and 262, is shown in FIG. 10.Equalization gain curves , expressed in units of dB, are plotted againstfrequency in FIG. 11. The frequency characteristic shown in FIG. 11 hasa form in which the subscriber line characteristic shown in FIG. 10,i.e. a line loss increased in proportion to √f, is compensated for.Namely, √f AGC equalizer gain frequency characteristic shown in FIG. 11is provided to compensate for line loss. If a loss of 520 dB occurs in a100 KHz-signal as shown in FIG. 10, an equalization gain of about 50 dBis provided as shown in FIG. 11. In other words, the frequencycharacteristic of FIG. 10 is opposite to that of FIG. 11. To enable theadaptive frequency characteristic to be selected, 16 equalization gaincharacteristic curves from 0 to 15 are provided. The adaptive curve isselected from the result of an AGC circuit.

FIG. 12A shows a circuit diagram of the √f equalizer. 2611 is a slopegain amplifier, 2612 is a flat gain amplifier for a coarse control, 2621is a flat gain amplifier for fine control, 266 is a low pass filter, and267 is a gain determining unit (decoder). Slope gain amplifier 2611 is apositive phase amplifier for receiving a received signal when switch 269in parallel with capacitor 268 is turned off. The amplifier 2611 thenbecomes a high-pass filter because of the influence of capacitor 268.

FIG. 12B shows a high-pass filter portion extracted from slope gainamplifier 2611. 2613 is a differential amplifier which is ideallycontrolled such that the input signals applied to plus and minusterminals are controlled to have the same voltage value. The inputimpedance of the differential amplifier 2613 is infinite. If the inputis V_(I) and the output is V_(O), the voltage at the minus terminal isobtained as follows.

    V.sub.O ×(R2+1/SC)/(R1+R2+1/SC)=V.sub.I              (1)

Therefore,

    V.sub.O =(R1+R2+1/SC)×V.sub.I /(R2+1/SC)             (2)

Laplace parameter S corresponds to frequency, and when frequencyincreases, the output V_(O) becomes (R1+R2)×V_(I) /R2. When frequency is0, namely, when direct current flows, V_(O) =V_(I), and the circuitbecomes a unity gain amplifier. As (R1+R2)/R2 is larger than 1, the gainof the transmission function varies from 1 to (R1+R2)/R2, therebyproviding a positive slope gain. Selection of a slope designating a gaincharacteristic, as shown in FIG. 11, is controlled by gain setting unit265, by changing the value of feed-back resistor R1 in FIG. 12A. If thefrequency characteristic has zero slope, namely, it is flat, switch 269connected in parallel with a capacitor 268 is turned on, therebyenabling a slope gain amplifier 2611 to operate as a positive amplifier.

Coarse plane gain amplifier 2612 is a amplifier for providing a coarsegain. This amplifier has a type of reversed phase and the input signalis multiplied by the value (feed-back resistance/input resistance) andis reversed, thereby providing the output. The gain control of a coarsegain code is conducted by gain setting unit 265. In this case, change inthe number of multiplications is determined by a coarse control, and thegain can be changed in 3 dB steps. A flat characteristic of a fineamplifier 2621 is structurally similar to that of a coarse amplifier2612, and gain can be changed in 0.2 dB steps, thereby providing a finegain characteristic.

FIG. 12C shows the principle of the flat gain amplifier. If differentialamplifier 2614 is ideal, the current flowing through resistor R1 is thesame as that through resistor R2 and the voltage at the minus terminalis equal to that at the plus terminal and thus, at the minus terminal itis imaginary zero. Therefore, the current flowing through resistor R1 isV_(I) /R1 for input voltage V_(I). This is equal to the current flowingthrough R2, namely, the current obtained by dividing minus V_(O) by R2.Therefore, the output V_(O) is expressed as follows:

    V.sub.O =-(R2/R1) V.sub.I                                  (3)

The value of the input side resistor R1 and feed-back resistor R2 isselected by gain setting unit 265. Thus, it is possible to obtain a flatgain.

FIG. 13 shows a circuit diagram of a *f equalizer and a gain settingunit. In the drawing, 2611 is a coarse slope gain amplifier and 2612 isa coarse flat gain amplifier. SW0 to SW10 indicate switches, whose onand off positions are controlled by a gain setting unit. SW4 is forcontrolling whether or not the slope of the coarse slope gain amplifier2611 should be provided, and switches SW0 to SW3 select a feed-backregister in FIG. 12B. If switch SW0 is turned on, and switches SW1, SW2and SW3 are turned off, then three resistors are connected in series tobe fed back, thereby providing a large feedback resistance. If onlyswitch SW1 is turned on, the feed-back resistance comprises the value oftwo serial resistors.

On the other hand, coarse flat gain amplifier has switches SW5, SW6 andSW7 to select the value of input side resistance R1 in FIG. 12C, andswitches SW8, SW9 and SW10 to select feed-back resistance R2. If switchSW5 is turned on, and SW6 and SW7 are turned off, the two resistors onthe left side are connected in series to an imaginary ground. If switchSW10 is turned on and SW9 and SW8 are off, a feed-back resistor isconnected to the output end minus terminal, namely imaginary ground,such that the three resistors on the right side are connected in series.These switches are selected by a code. If the coarse gain code is 8,switches SW1 , SW4, SW6 and SW9 are turned on and the others are turnedoff.

FIG. 14 shows a circuit diagram of a fine flat gain amplifier 2621 andan embodiment including a gain-setting unit. Its structure is the sameas that of the coarse average gain adjustment amplifier. This drawing issimilar to FIG. 12C and input side resistance R1 and feed-backresistance R2 are selected by a switch. Switches SW11 to SW16 determinethe input side resistance and switches SW17 to SW22 determine the outputside resistance. If, for example, the fine gain code is 8, switches SW12and SW18 are turned on and the others are turned off. Therefore, theinput side resistance comprises 5 fixed resistors connected in series,and the feed-back resistance comprises two resistors connected inseries.

FIG. 15 is a block diagram of a gain setting unit and a power computingunit 264. When the output from a coarse amplifier and fine amplifier aresubjected to an A/D conversion, the power computing unit computes thepower of the input signal. The value of the power sets the gain of thecoarse amplifier and the fine amplifier, thereby providing a coarse gainsetting decoder 2615 and a fine gain setting decoder 2622 (both composedof ROM). The number of coarse gain codes is 16, namely, 0 to 15, and thenumber of fine gain codes is 32, namely, 0 to 31. The output of thepower computing unit 264 selects one of the coarse gain codes to obtainthe result of a power computation, and selects one of the 32 fine gaincodes by using a control signal for switching control corresponding to agiven coarse gain code stored in ROM. For example, when the coarse gaincode is 8, switches SW1 , SW4, SW6 and SW9 corresponding to coarseamplifiers are turned on and the others are turned off, and theseswitching operations are controlled by ROM. When a switch is on, it isdeemed "1" and when it is off it is deemed "0". ROM sends appropriate0/1 switch control signals to the coarse slope gain amplifier shown inFIG. 13, thus controlling on and off switching of the switches.Similarly, a fine gain setting decoder outputs a switching patterncorresponding to a fine gain code. For example, for a coarse gain codeof 8, switches SW12 and SW18 are turned on and a control signalcorresponding to switches SW12 and SW18 are turned to "1" and the otherswitches are turned to "0". These signals constitute a switch controlsignal for the fine flat gain amplifier shown in FIG. 14.

FIG. 16 shows a flow chart for an automatic gain control circuit forsetting a gain. GC is a coarse gain code, GF is a fine gain code, and Pcis a target power. When the automatic gain control flow starts, theinitial values are set at GC=8 and GF=15, and the power calculation isstarted in accordance with equation (4) in FIG. 16. Power is obtained byaveraging the square of the signal output from the A/D converter for oneperiod. The ratio of the result of the power computation P to the targetpower Pc is also obtained. This ratio is expressed in decibels toprovide a value which is divided by 3. The integer portion of this valueis subtracted from 8 to provide GC in accordance with equation (4).Coarse gain code GC is then output. A similar power calculation isconducted to provide fine gain codes in accordance with equation (5) inFIG. 16. When a fine gain code is produced, the result of the powercomputation is divided by a target power Pc and converted to decibels.This value is divided by 0.2 and the integer portion of the dividedresult is subtracted from 15. Thus, the AGC is completed.

In order to set an initial gain of ∞f AGC, for example, GC=8 and GF=15,a power calculation is conducted. The difference between the obtainedpower P and the target power Pc is calculated in decibels and convertedto a coarse amplifier code which can be varied in 3 dB steps, or a fineamplifier code which can be varied in 0.2 dB steps. Calculations such as(4) and (5) are conducted by a so-called DSP (Data Signal Processor) butit is difficult to perform a processing in real time. Therefore, afollowing counter-measure is considered.

For example, in order to obtain a coarse amplifier code, the followingvalues should be included in the table in accordance with the followingequation,

    P.sub.R (I)=P.sub.C.10.sup.(3I-1.5)

    where I=-7 to 8.

FIGS. 17 and 18 show a flow chart for obtaining the code Gc and a tableobtained from the above equation, respectively. For example, a powercomputation P is changed from 16 p/pc to -18 db with regard to a targetpower PC, and then a separation condition is determined at I=-6. If thecondition is YES, Gc=14 is set. The computed power of a nondistortedwaveform is set as a target power. A waveform power distorted by lineloss is computed and compared with the target power, and a gaincorrection is conducted, resulting in an error. However, according tothis invention, a most suitable √f equalizer characteristic isconstituted by a coarse amplifier with a √f characteristic, and thewaveform power is again computed to obtain a state such that theoriginal waveform is reinstated, thereby setting the gain of a fineamplifier and suppressing the error to a minimum.

As described above, in the present invention, as shown in the structureof FIG. 8, namely, that in which an echo canceler is provided after theequalizer, and in which echo canceler training precedes AGC training,switch 30 is switched to the initial gain side G_(I), and switch 31 forcorrecting an echo replica ER is switched to the non-correction side,namely, the x1 side. Therefore, line equalizer gain is fixed at GI. Thetraining signal transmitted from the home apparatus performs anarithmetic operation to enable an echo replica to be obtained by an echocanceler 21. Echo canceler 21 has tap coefficients (described later) forproducing a adaptive echo replica. Therefore, echo canceler 21 completesa preliminary training. Next, the switch 30 is turned to the side of theAGC circuit 27, causing it to perform an AGC operation to obtain theadaptive gain. The AGC circuit performs an arithmetic operation toobtain the adaptive gain G_(F) within a constant training period by atraining signal received from the opposite apparatus, thereby providingthe adaptive gain to a line equalizer, and maintaining it. Then,training of the AGC circuit is completed. Utilizing the adaptive gainG_(F) and initial gain G_(I), the gain correction unit calculates theratio G_(F) /G_(I). A multiplying unit within the echo cancelermultiplies the echo replica by the ratio obtained from the gaincorrecting unit so that a correction of tap coefficients is conducted tocancel an echo. Namely, a tap coefficient is stored corresponding to themost appropriate gain. When all the tap coefficients are corrected,switch 31 is switched to its normal position and initial training iscompleted. Thus, the system is now in a communication state. Next, thecase in which tap coefficients are rewritten according to the adaptivegain within the echo canceler is explained.

FIG. 18A shows a circuit structure of an echo canceler EC i.e. an echocanceler of the transversal type. The blocks T are delay circuits fordelaying an input signal, namely, a transmitted signal. The outputs ofthe delay circuits are entered into one of the multiplier inputs. Theother input of the multiplier C_(N) is supplied by tap coefficientcontrol circuits 36. The output of all the multipliers is given to theadder circuit 35, thereby forming a transversal filter. The outputs ofthe delay circuit are input to the tap coefficient control circuit. Theoutput of the transversal filter is input to one input of the subtractoras an echo replica signal. The transmitted signal is transmitted to asubscriber line through a hybrid circuit, and is input to the otherinput of the subtractor as an echo signal in the home apparatus througha hybrid circuit. The result of the subtraction of an echo replica fromthe signal is output as a remaining signal constituting an error signal.

This error signal is fed back to the tap coefficient control circuit andthe adaptive value from Cl to Cn is determined. This value is a tapcoefficient. Namely, when an impulse is provided to the transmittedsignal through a training process, an echo signal is input to asubtractor. If the tap coefficient is determined at an appropriatevalue, the output of the transversal filter is not an echo signal of theinput. Therefore, the error signal is not 0 and the tap coefficientcontrol circuit changes the tap coefficient in a direction in which theerror is decreased. The square or the error signal is considered as anenergy function and the tap coefficient is selected such that the energyfunction is a minimum. The repeating process is concentrated and a echoreplica similar to the echo signal of the training pulse is output fromthe transversal filter. As a result, the error signal of the remainingecho becomes 0. Namely, the transmitted signal is input to theapparatus, and is controlled such that the output of the transversalfilter becomes the same as the echo signal. Therefore, the tapcoefficient determines a quasi-impulse response.

FIG. 18B is a conceptional view for explaining the process of cancellingan echo.

The output of echo canceler 21 is considered as an echo replica to beexpressed as a symbol ED and a transmitted pulse is expressed as SP. Anecho signal for transmitting a pulse which leaks through a hybridcircuit is EA, and the signal which digitizes the echo signal is ED. Theremaining echo, namely, ER--ED, is RE. These waveforms are shown in FIG.18B. The transmitting pulse, an extremely narrow width pulse, is givenas a questionable impulse signal, and then echo signal EA is output as agently-sloping waveform signal from the hybrid circuit. The output issubjected to A/D conversion. The A/D converter is sampled by a samplingclock and quantized at a rising point of the sampling clock. Thequantized output becomes ED, and is output. On the other hand,transmitted pulse SP controls the echo canceler so that its output isequal to echo signal ED, and the result is output as echo replica ER.When the echo canceler selects an appropriate coefficient, almost thesame waveform as echo ED is output as ER, as shown in FIG. 18B. However,as echo replica ER is not equal to a complete echo signal ED, the outputof the subtractor, namely the remaining echo, is expressed as RE, equalto ED-ER. If the signal of echo replica ER equals echo signal ED, theresidual echo RE, as shown in FIG. 18B, is almost 0.

FIG. 19 is a structural view of a table reference type digital echocanceler. 37 shows a shift register and 38 shows a RAM. A transmissionpattern corresponding to the transmitted signal is supplied to the shiftregister 37 as 01 pattern in a bit serial manner, and the transmittedpattern is applied as the address of a memory. An echo replica signal isread out from the memory and entered into one of the inputs ofsubtractor 39. The other input of the subtractor 39 receives an echosignal formed by a transmission pattern through a hybrid circuit. Theoutput of the subtractor is the remaining echo. An echo replica signalcorresponding to the transmission pattern is stored in a memory, and theinterrelationship between the transmission pulse and the echo replicasignal corresponding to the transmission pulse is stored in the memoryto perform an echo cancelling operation. In order to produce the mostsuitable echo replica signal, the memory content is dynamicallyrewritten through a data line a.

FIGS. 20A, 20B and 20C show a method of correcting the echo replica byusing a waveform forming and the adaptive gain. FIG. 21 is aconceptional diagram showing how a waveform is formed by √f AGC. FIG. 21is a conceptional view showing how an echo replica is formed by using atransmitted and received waveform and G_(I) /G_(F).

FIG. 20A shows a training of an echo canceler and when the transmissionpulse is transmitted from the apparatus to the transmission line, echois transmitted from the hybrid circuit to the home apparatus, namely, onthe receiving path. According to this invention, even if an echocanceler is provided after the automatic gain equalizer in order todecrease the bit number upon the conversion of the input, echo trainingof echo cancellation is conducted before the training of the automaticequalizer. The gain of the equalizer concerning the received signal isfixed at G_(I) and the echo signal is thus amplified by this initialgain. On the other hand, the echo canceler is subjected to a trainingsuch that the echo canceler can produce an echo replica signal bymultiplying the echo signal by G_(I), An echo replica signal obtained byan echo canceler is a pseudo signal of the actual echo and the gainG_(I) is not the adaptive G_(I). Thus, the echo replica does not havethe same waveform as the echo, as the difference between them, i.e. theremaining echo is not 0. As shown in FIGS. 20B and 20C the differencebetween an echo and an echo replica is not expressed by a subtractionbut by a sum. When the training signal of the transmitting pulse isreceived from an opposite apparatus, the received signal is attenuatedin accordance with a *f characteristic of loss. During the training ofAGC, the power of the received signal is calculated and the adaptivegain G_(F) is selected to reproduce the original transmission pulsebased on the power calculation. Namely, because of the training of theAGC, a distorted received signal is amplified, thereby providing thereproduction of the original transmission pulse in respect of itswaveform.

As shown in FIG. 21, a waveform formed by √f AGC equalizer provides apulse width larger than the pulse width T of the transmission pulse ifthe length of the transmission line is much longer than the pulse widthT, thereby producing a waveform signal of a large waveform distortion.This is reproduced by a coarse amplifier to provide an originaltransmission pulse of 3 db-step accuracy. As it is a coarse control, arough pulse is reproduced. Therefore, by using a fine amplifier, thepulse is further corrected to 0.2 db step accuracy, thereby reproducingthe same pulse as the transmission pulse. If the transmission pulselength is very short, the pulse width T of the received signal issimilar to the pulse width T of the transmitted pulse, thereby producinga less distorted received signal. In FIG. 21B, the received signal isobtained by multiplying the transmitted pulse by G_(F) and therebyreproducing the original pulse. In this instance, the adaptive G_(F) isdetermined by the AGC. When the echo is multiplied by G_(I), an echoreplica signal of the same value as the original transmission signal isobtained. For G_(F), the echo replica signal is multiplied by G_(F)/G_(I) where the received signal is obtained by multiplying the echo byG_(F). The difference between the actual echo and the corrected echoreplica signal is almost 0. As stated above, even if the echo canceleris provided after the equalizer, the echo canceler can train the echo.

FIG. 22 is a circuit diagram of an embodiment of a hybrid circuit. Thevoltage of the transmitted signal is divided by Z_(s) and Z_(e) and istransmitted to a transmission path through a hybrid transformer HYB. Inthis case, the reference voltage within an apparatus is grounded and thereference voltage of the transmission pulse is one terminal of thesecondary side of the transformer. The difference voltage on the primaryside of the transformer is transmitted to the transmission path, as thevoltage is floating from the earth. The voltage of the transmittedsignal divided by Z_(s) and Z_(b) is supplied to a minus terminal of adifferential amplifier 39. Therefore, when a signal is transmitted andZ_(b) is determined to be equal to the impedance Z_(e) which is obtainedby viewing the transmission path, the received signal becomes 0. ButZ_(b) cannot generally be made equal to Z_(e). Therefore, the echosignal leaks into the receiving side. The received signal is convertedto a voltage through the transformer input to the plus side of thedifferential amplified. In this case, the minus terminal of thedifferential amplifier 39 is 0 volts. The voltage corresponding to theinput voltage of the transmitted pulse appears as the output of thedifferential amplifier.

FIG. 23 shows a timing chart of an initial training of the transmissionapparatus according to this invention.

Even if the echo canceler is provided after the equalizer, an echotraining can be conducted before the training of the equalizer. The onperiods of switches 30 and 31 in FIG. 8 are respectively t₁ and t₂, andare determined by a timer. It takes time for the echo canceler to forman echo replica signal to cancel echo produced by the transmitted pulseand this is called the training time of the echo canceler. As shown inFIG. 23, training of the echo canceler is completed t₁ after it starts.When it is completed, AGC training is started. Therefore, a total timeof (t₁ +t₂) passes before the transmitted pulse is received from anotherapparatus and the power of the received signal is calculated to obtainthe adaptive gain from the calculated value. Training of the AGC iscompleted time t₂ after it starts. According to the present inventionthe switch is controlled to perform a training of the echo canceler andthe AGC twice. When switch 30 in FIG. 8 is turned to the G_(I) side, andthe switch 31 is turned to the fixed value 1 side, the training of theecho canceler is conducted with respect to the gain G_(I). Themultiplicataion factor of the replica of the echo canceler is set to 1by switch 31 . From start to end of AGC training, the switch 30 isturned to the G_(F) side, and switch 31 is controlled to select G_(F)/G_(I). Namely, the gain G_(F) of the equalizer is selected by theautomatic gain controller and G_(F) /G_(I) is calculated by the gaincorrecting unit, and the switch 31 is turned on such that the outputachieves an amplification factor of an echo replica.

FIG. 24 is a timing chart showing the initial training method of the √fequalizer shown in FIG. 3. t₃ is the time from start to end of AGCtraining. A coarse power computation taking time t₄ is first conducted.When this is completed the output of the coarse gain setting decoder isdetermined and a coarse gain code is set. Then a fine power computationtaking time t₅ is conducted. The fine power computation ends after atotal time t₃ and the fine gain setting decoder of FIG. 15 sets the finegain code. That is, time t₃ =t₄ +t₅, corresponds to the time from startto end of AGC training and this training time is determined by thefrequency shift sampling. After AGC training is completed, the devicereverts to normal switching status. Thus, a normal frequency sampling isperformed.

FIG. 25 shows a second example of a timing chart for switching ofswitches 30 and 31 during training of the AGC and echo canceler. t₆ isthe time from start to end of echo canceler training. In this case,switch 30 is turned to the G₁ side and switch 31 is turned to a fixedvalue "1" side. Equalizer gain is fixed at the value G_(I) and the gainof the echo replica is 1 . When echo canceler training is completed, AGCtraining starts, and switch 30 is turned on to the G_(F) side and switch31 is turned to the side from which G_(F) /G_(I) is output. AGC trainingis completed after time t₇ and then the adaptive G_(F) is obtained. ThisG_(F) is used to calculate G_(F) /G_(I). To correct the remaining echo,echo canceler training starts again within the echo canceler after AGCtraining is completed, thereby initiating a correction of tile tapcoefficients. The correction of tap coefficients and initial training iscompleted after time t₈. At this point, switch 31 is turned to the gain"1" side to enter the device into a communication status. According tothe present invention, if the echo canceler is located after theequalizer, the initial training of the transmission apparatus can beconducted without relying on the training order. Even under the rulethat echo canceler training be conducted prior to AGC training, theadaptive training is conducted. Even if echo canceler training isconducted after automatic quantizer training initial training of thetransmission apparatus is realized.

In the above embodiment shown in FIG. 8, A/D converter 28 is placedafter line equalizer 22 but it may be placed before line equalizer 22,thereby enabling line equalizer 21 to perform a digital processing.

Further, even where a correction of a replica signal is not sufficient,the echo canceler can suppress the echoes to maintain adaptive operationduring a communication.

If the training of the transmission apparatus is conducted in the orderof automatic equalizer and then echo canceler as is similar to the priorpart, switches 30 and 31 may be set at the position shown in FIG. 8.

As described above, according to the initial training method of thepresent transmission apparatus, an automatic equalizer is, at first,fixed to an initial gain to perform a training of an echo canceler, andthereafter the adaptive gain which is most appropriate for an automaticequalizer is obtained. Then the ratio of the adaptive gain to theinitial gain is obtained to correct a replica signal during acommunication. Therefore, even if the echo canceler is provided afterthe automatic equalizer, an initial training can be realizedindependently of the order of training. The design of the apparatus isthereby made more flexible and the cost is reduced.

As generally described, the transmission apparatus has an automaticequalizer to compensate for deterioration of signals passing through thetransmission path, and the automatic equalizer adopts a method of A/Dconverting a received signal to perform an arithmetic operation thereon.In order to establish mutual synchronization between transmitted andreceived signals before the start of a normal data transmission, an AGCand an echo canceler training can be conducted as an initial training.In the initial training of an automatic equalizer equipped with an A/Dconverter, there is a problem of how to determine the sampling rate forsampling the converter.

The sampling frequency of the A/D converter corresponds to thetransmission rate. The initial training is determined to be a valueshifted a predetermined amount from the sampling frequency. Theappropriate frequency is determined after the training is completed.This new method will be explained later.

FIGS. 26A and 26B respectively show an operation of the sampling methodof the prior art and the sampling method of the present invention.Generally speaking, training of the automatic equalizer is conductedduring an initial training period of the transmission apparatus. Afterthe correct received signal is reproduced, timing information of clocksignals can be achieved by PLL. Therefore, upon initial training, atiming, namely, phase information of the received signal, is notobtained. Therefore, in order to perform an AGC training during a periodof no timing information, as shown in FIG. 26A, the received signal mustbe subjected to an A/D conversion at a sampling frequency N×fs: morethan twice that of the received signal rate or transmission path ratefs. Namely, 40 is a received signal and T is a period, and the inverseof T is transmission path rate, namely, frequency fs. The samplingfrequency for A/D conversion is shown as being sampled at a positiondesignated by the arrows in the lower side of FIG. 26A. The period isT/N. Therefore, when an automatic equalizer equipped with an A/Dconverter having such a high speed sampling frequency is integrated, itis difficult to achieve economy, miniaturization and high reliability inthe transmission apparatus. Further, as has recently been observed,transmission path speed increases with the expansion of transmissioncapacity. This causes a great problem. Therefore an object of thepresent embodiment is to provide an automatic gain controller equippedwith an A/D converter whose sampling rate is low. In order to provide amethod of performing a sampling upon an initial training of theautomatic gain controller, a frequency shifted a predetermined amountfrom the transmission path rate f_(s) is used as a sampling frequencyand thereafter the sampling rate is set to the transmission path speed,that is, a baud rate.

FIG. 27 is a conceptional view of an A/D converter 41 of this embodimentand FIG. 26B an operation diagram of a sampling of this invention.

In an initial training of a sampling frequency, an initial trainingmethod of the automatic equalizer shown in FIG. 27, the samplingfrequency for the initial training is determined as fs+Δ with regard tobaud rate f_(s), and when the training is completed the samplingfrequency is returned to fs. The sampling phase of the A/D converter 41within a transmission apparatus before the timing information of thereceived signal is obtained, performs a freerunning between the masterand slave source oscillators at a rate determined by the frequency error(normally 0 to several hundreds of ppm) with regard to the receivedsignal phase.

As shown in FIG. 26B, the present invention intentionally sets thesampling frequency to a value shifted a predetermined amount ±Δ from thetransmission path rate fs, thereby providing a sampling frequency offs±Δ. The analog waveform in the FIG. 26B is the output of a lineequalizer. If the sampling frequency is set to fs-Δ, the samplingposition is determined to be a period T+t with regard to the period T ofthe transmission path. In this case a more stable power can be obtainedthan that with a sampling frequency fs, namely, with a period T. If thisshifted sampling is conducted by shifting the period T by t, namely, thesampling frequency is determined as fs-Δ, the initial sampling point isthe same as the baud rate sampling point designated by a mark on theanalog waveform of the output waveform from the line equalizer. However,the following sampling point occurs after time T+t, the following oneafter time 2(T+t) and the next after time 3(T+t). Therefore, the firstpoint is shifted by t from the period T of the sampling frequency, thesecond by 2t, and the third by 3t. This means that the waveform of theoutput signal from the equalizer is scanned when the waveform isobserved for a long period. Therefore, the power computation can beconducted almost correctly. Namely, the correct power computation resultis obtained and the training is conducted. After the training iscompleted, the sampling frequency is switched to the transmission pathrate f_(s) and the sampling frequency of the A/D converter is decreaseduntil it reaches near the transmission rate.

According to the initial training system of the automatic equalizershown in FIG. 28, the embodiment comprises analog line equalizer 42, A/Dconverter 43, power calculation circuit 44, AGC circuit 45, andfrequency divider 46, as is similar to FIG. 8. Source oscillator 47 ofoscillation frequency f_(m1) and source oscillator 48 for an oscillationfrequency f_(m2) for an initial training are provided and they areswitched by a switch 49. Therefore, the dividing ratio of the frequencydivider 46, may be determined as a value to change an oscillationfrequency f_(m1) to the transmission path rate fs. In this case, theoscillation frequency f_(m2) is divided to a frequency fs-Δ(fs+Δ may beused). As the predetermined value ±Δ, for example, a value of 20% fs maybe used. In this case, fs-=0.8 fs and the period t shown in FIG. 26B is0.2T.

The operation of the embodiment shown in FIG. 28 is explained here.

The switch 49 is first switched to the position shown in FIG. 28 and theoscillation frequency f_(m2) is frequency-divided by frequency divider46 and the sampling frequency of 0.8 fs is provided to A/D converter 43.

A/D converter 43 performs a sampling of a received signal which isequalized by a line equalizer 42. Thus, a random sampling value X_(n) isobtained. Power computation unit 44 obtains an average power E (X_(n) ²)based on sampling value Xn. The result obtained by this arithmeticoperation is fed back to AGC circuit 45, which scans the received signalto provide the adaptive gain.

When the adaptive gain is obtained, AGC circuit 45 transmits a signal toswitch 49 indicating completion of training, and switching it to theside of source oscillator 47.

Then, a sampling frequency equal to the transmission path rate f_(s) issupplied to A/D converter 43 from the frequency divider 46. Thereafter,sampling is performed in accordance with the transmission path rate toconduct an automatic equalizing operation when the system is incommunication.

The present invention may be applied to digital subscriber lines(cables) and so on. After the training is completed, analog waves neednot be reproduced and sampling is conducted in accordance with thetransmission path rate.

The embodiment shown in FIG. 28 realizes line equalizer 42 in an analogsignal area but it may be provided after A/D converter 43. Then, afterthe received signal is converted to a digital signal, a lineequalization may be conducted.

The embodiments shown in FIG. 28 and 29 use two oscillators, but onlyone oscillator 50 is used in the embodiment shown in FIG. 30. Theoscillation frequency of the source oscillator 50 is applied tofrequency dividers 51 and 52 which have respective ratios of frequencydivision of 1/f_(m) 1 and 2/f_(m) 2. Frequency dividers 51 and 52produce respective sampling frequencies fs and fs-Δ, and the switch 53is changed in accordance with a training completion signal from AGCcircuit 45. It is possible to provide a switching function in a samplingfrequency in the A/D converter.

As described above, the sampling method of the present invention enablesthe transmission rate to be shifted by a predetermined period upontraining, to perform a sampling of the A/D converter equipped with thetransmission apparatus. When the sampling is completed, the samplingfrequency of the A/D converter is switched to the baud rate, namely, thetransmission path rate. Therefore, the present invention meets thedemand for operational speed of the A/D converter and enables it to beeasily integrated in an LSI, thereby decreasing the cost of theapparatus.

What is claimed is:
 1. An initial training apparatus for training acommunication apparatus, comprising:an echo canceler, connectable toreceive a training signal, producing a replica echo signal responsive tothe training signal; and an automatic equalizer having a gain andoperatively connectable to said echo canceler, said automatic equalizerincludingmeans for setting the gain to an initial gain; means fortraining said automatic equalizer to set the gain to an adaptive gain independence upon the training signal, and means for comparing theadaptive gain with the initial gain and for correcting the replica echosignal from said echo canceler responsive to the comparing by said meansfor comparing.
 2. The initial training apparatus according to claim 1,wherein said echo canceler is operatively connected in series with saidautomatic equalizer.
 3. An initial training apparatus for training acommunication apparatus, comprising:an echo canceler, connectable toreceive a training signal, producing a replica echo signal responsive tothe training signal; and an automatic equalizer having a gain andoperatively connected to said echo canceler, said automatic equalizerincludingmeans for setting the gain to an initial gain; means fortraining said automatic equalizer to set the gain to an adaptive gain independence upon the training signal; means for dividing the adaptivegain by the initial gain and for providing a result based on thedividing; and means for multiplying the echo replica signal by theresult to correct the echo replica signal.
 4. The initial trainingapparatus according to claim 3, wherein said echo canceler has a fixedgain equal to "1".
 5. An initial training apparatus according to claim3, further comprising means for setting the initial gain to a fixedvalue.
 6. An initial training apparatus for training a communicationapparatus, comprising:hybrid circuit means for transmitting atransmission signal and for receiving a first signal having a power;automatic equalizing means, operatively connected to said hybrid circuitmeans, for receiving an echo signal when said hybrid circuit meanstransmits the transmission signal and when said hybrid circuit receivesthe first signal, for obtaining a gain responsive to the power of thefirst signal, for providing an adaptive gain and for providing an outputsignal; echo cancelling means for receiving a transmission pulse and forproducing an echo replica signal to minimize the residual echo signaland for outputting the echo replica signal after said communicationapparatus has received the transmission pulse; gain correcting means forcorrecting a gain of said echo cancelling means based on the adaptivegain obtained by said automatic equalizing means; and subtracting meansfor forming an echo residual signal by obtaining a difference betweenthe echo replica signal after the gain correction is applied to the echoreplica signal and the output signal from said automatic equalizingmeans.
 7. The initial training apparatus according to claim 5, whereinsaid gain correcting means comprises:means for determining an initialgain to be 1 before correction of the gain, calculating means forcalculating a result based on a relation between an optimal gain and theinitial gain, and means for applying the result to the echo replicasignal.
 8. The initial training apparatus according to claim 7, whereinsaid calculating means includes means for dividing the optimal gain bythe initial gain.
 9. The apparatus according to claim 6, wherein saidautomatic equalizing means comprises:line equalizer means for receivingthe echo signal from said hybrid circuit and for providing a firstoutput signal based on the echo signal and a variable gain; A/Dconverter operatively connected to said line equalizing means forproviding the output signal after converting the first output signal;automatic gain control means for computing power of the output signaland for controlling the variable gain based on the computed power value;and switching means for selecting one of an initial gain and theadaptive gain.
 10. The initial training apparatus according to claim 9,wherein said line equalizer means comprises:a coarse amplifier; and afine amplifier for producing a gain to compensate for a line loss in atransmission line.
 11. The initial training apparatus according to claim9, wherein said automatic gain control means comprises:a plurality ofswitching elements; power computing means for determining a power of theoutput signal; and gain setting means, operatively connected to saidswitching elements, for providing a control signal which selects aconnection status of said switching elements to set the variable gain ofsaid line equalizer means according to the power determined by saidpower computing means.
 12. The initial training apparatus according toclaim 11, further comprising:a course amplifier having a gain; and afine control amplifier having a gain, and wherein said gain settingmeans comprises: first decoder means for producing a coarse control codefor setting the gain of said coarse amplifier based on the powerdetermined by said power computing means, and second decoder means forproducing a fine control code to set the gain of said fine controlamplifier from the power determined by said power computing means. 13.The initial training apparatus according to claim 12, wherein said firstand second decoder means comprise a ROM.
 14. The initial trainingapparatus according to claim 9, wherein said automatic gain controlmeans includes means for determining the variable gain from a tableincluding a decibel value representing a difference between apredetermined target power and the power computed by said automatic gaincontrol means.
 15. The initial training apparatus according to claim 6,wherein said echo cancelling means comprises a transversal filter. 16.The initial training apparatus according to claim 6, wherein said echocancelling means comprisesshift register means for setting a pattern ofthe transmission signal, and memory means for outputting the echoreplica signal in accordance with the pattern obtained from said shiftregisters means.
 17. An initial training apparatus, comprising:echocanceler means, connectable to receive a first signal, for producing areplica echo signal based on the first signal; automatic equalizermeans, having an initial gain and connectable to receive the firstsignal and for providing an adaptive gain based on the first signal andthe initial gain; means for dividing the adaptive gain by the initialgain; gain correcting means for providing a ratio responsive to thedividing of the adaptive gain by the initial gain by said means fordividing; and correction means for correcting the replica echo signalbased on the ratio and the replica echo signal.
 18. An initial trainingapparatus according to claim 17, wherein said correction meansincludes:means for providing a multiplication result responsive tomultiplying the replica echo signal by the ratio; and means forsubtracting an output signal from the multiplication result andoutputting the result of the subtracting.
 19. An initial trainingapparatus according to claim 17, further comprising:hybrid circuit meansfor transmitting a transmitted signal, for receiving a second signal andfor providing a residual echo signal after one of transmitting thetransmitted signal and receiving the second signal.
 20. An initialtraining apparatus according to claim 17, wherein said automaticequalizer means includes:means for multiplying the residual echo signalby one of the initial gain and the optimal gain; line equalizer meansfor providing an output signal responsive to an echo signal; A/Dconverter means, responsive to the line equalizer means, for convertingthe output signal to a digital signal; gain control means forcalculating a power of the digital signal and for calculating theoptimal gain based on the power; and switching means for selectivelyproviding one of the initial gain and the optimal gain.
 21. An initialtraining apparatus according to claim 20, further comprising:hybridcircuit means for transmitting a transmitted signal, for receiving asecond signal and for providing an echo signal after one of transmittingthe transmitted signal and receiving the second signal.
 22. An initialtraining apparatus according to claim 17, further comprising:switchingmeans for selectively providing one of a predetermined value and theratio.
 23. An initial apparatus according to claim 22, wherein saidcorrection means includes:means for providing a multiplication resultresponsive to multiplying the replica echo signal by one of a gain equalto one and the ratio; and means for subtracting an output from saidautomatic equalizer means from the multiplication result.
 24. An initialtraining apparatus according to claim 17, wherein said automaticequalizer means includes:amplifying means for amplifying one of thefirst and second signals responsive to a gain control code; A/Dconverter means for converting the amplified one of the first and secondsignals to a digital signal; power computation means for calculating apower of the digital signal; and gain setting means for providing thegain control code to said amplifying means responsive to the powercalculated by said power computation means.
 25. An initial trainingapparatus according to claim 24, wherein said amplifying meansincludes:a course slope gain amplifier; and a fine flat gain amplifier.26. An initial training apparatus according to claim 24, furtherincluding:a low pass filter for filtering the digital signal to anequalized signal, and wherein said power computer means includes meansfor determining power of the equalized signal.
 27. An initial trainingapparatus according to claim 24, further including:a plurality ofswitches, each having a plurality of states.
 28. An initial trainingapparatus according to claim 32, wherein each of said switches has aplurality of states, and said gain setting means includes:means forselecting one of the states of each of said switches.
 29. An initialtraining apparatus according to claim 17, wherein said echo cancelermeans comprises a traversal filter.
 30. An initial training apparatusaccording to claim 17, wherein said echo canceler meanscomprises:shifting means for serially shifting the first signal by bitsto produce an address; and memory means for storing the replica echosignal corrected by said correcting means at the address provided bysaid shifting means.
 31. An initial training apparatus according toclaim 17, wherein said automatic equalizer means comprises:lineequalizing means for providing a first output signal by equalizing thefirst signal responsive to the appropriate gain; oscillator means forproviding an oscillation frequency equal to the transmission frequency;frequency divider means for providing a sampling frequency responsivethe oscillation frequency; A/D converter means for providing a digitalsignal responsive to sampling the first output signal based on thesampling frequency; power computation means for calculating an averagepower of the digital signal; and gain control means for determining anoptimal gains responsive to the power.
 32. An initial training methodfor correcting a replica echo signal produced by a transceiver having aninitial gain, after transmitting a signal, comprising the steps of:a)determining an initial gain of the transceiver after transmitting thesignal; b) performing an initial training of an echo canceler; c)performing an initial training of an automatic gain control; and d)correcting the replica echo signal produced by the echo canceleraccording to a gain of the automatic gain control and the initial gain.